Week1: Course Introduction | Handout
Week2: Design Partionining, Power Consumption | Formal Equivalence Checking | (1)
Week3: Interconnect Parasitics | Cross Talk | (2) | Prasitics Formats for Circuit Characterization
Week4: Technology | (Part 2) | (Part 3)
Week5: Midterm 1 Review | Basic Concepts | Constraints
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Week 5: Midterm 1 Review
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Week6: Example 6.1 | Timing Report | Midterm 1
Week7: Generated Clock | Synchornous, Asynchronous, & Exclusive Clocks | Flatterning & Structuring | Compiling | Top Down, Bottom Up
Week8: TCL - Part 1 | TCL - Part 2
Week9: TCL - Part 3 | TCL - Part 4
Week10: Midterm 2 Review | SDF
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Week 10: Midterm 2 Review
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Week11: SDF | Midterm 2
Week13: Single Operating Condition Analysis Mode, BC/WC, Onchip Variation (OCV) | Timing Exception
Week14: Timing Exception | Timing Borrowing in Latch Based Designs
Week15: Final Review